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Paper Design of Crystal-Oscillator Frequency Quadrupler for Low-Jitter Clock Multipliers

From Karim M. Megawer’s Paper

  • integer-N
  • 54-MHz-4.752-GHz
  • RO-based ILCM
  • 366fs
  • 6.5-mW.

Introduction

Assuming reference clock is generated by a low-noise XO, the in-band noise is typically dominated by PD and CP while VCO limits the out-of-band noise performance. One straightforward method to improve noise performance involves increasing the reference frequency, \(F_{REF}\). Higher \(F_{REF}\)

  • lowers PD/CP noise contribution by reducing the multiplication factor, \(N\).
  • reduces in-band quantization error of the \(\Delta \Sigma\) fractional divider by increasing over-sampling frequency.

second ponit not clear to me

  • helps to increase noise suppression bandwidth (BW) of VCO, which is about \(F_{REF}/10\).

Higher \(F_{REF}\) also brings similar benefits to multiplying delay-locked loops (MDLLs), and injection-locked clock multipliers (ILCMs) by increasing their VCO noise supperssion BW. State-of-the-art (before this paper) achieve an excellent figure of merit (FoM) of arount -248 dB by limiting \(N\) to 4 and using 375-MHz and 2-GHz reference clocks, respectively. However higher frequency XO means higher cost. Thus this work designs a low jitter frequency quadrupler used for low frequency XO, then the signal can act as new reference for the following frequency synthesizers. Further study of the literature on ring oscillator (RO)-based clock multipliers reveals that to achieve better than −240-dB FoM, \(N\) is typically less than 40. To this end, we present a method to quadruple the frequency of a conventional 54-MHz Pierce XO. We then use the quadrupler output as the reference clock to an ILCM as illustrated in Fig. 1 and demonstrate a 54-MHz–4.752-GHz RO-based ILCM that achieves 366fsrms integrated jitter while consuming 6.5-mW power of which the reference generator (XO and quadrupler) consumes less than 1.5 mW.

Reference Frequency Generation

One possible way to achieve this goal is by using a frequency doubler circuit shown in Fig. 2. Implementing such a large delay either degrades phase noise or incurs a large power penalty. In view of this, we present an alternate method to quadruple the frequency of a conventional Pierce XO without needing large delays. This makes it practical for low-jitter low-power applications.

Proposed XO Frequency Quadrupler

Concept

  • First doubler is composed of two comparator with two different threshold voltages.
  • Second doubler is conventional doubler with small delay.

Non-Idealities

Three error patterns.

Duty-Cycle Error Correction

Because ILCM can not exactly follow the period jitter of the reference, it can be used to produce the error signal.

This post is licensed under CC BY 4.0 by the author.